Pulltube max11/24/2023 ![]() > would this work in real life as predicted in SPICE? If they were in-phase, the voltage between them would be smaller than the voltage from one output to ground. Does your simulator have a dual-trace o'scope? If not, use a differential voltage probe. ![]() > the output on both plates are in phase and has 7V rms from V1A and 5.2V rms for V1B, Also: what is it feeding back, power supply ripple? That's all it can feed-back from!Īs for the simulator blowing up: if you have C7 and C8 (why?) but nothing between them to leak-off the DC, most SPICEs will object because they can't compute the DC condition at the junction of C7 C8 (even if we don't care). It drives the low-low-low impedance of the Ideal opamp and the 47uFd caps. BUT it has to be there otherwise the simulation will not work.Ĭan't be feedback, or not any significant amount. > R6 I am not quite sure what it is like some sort of feedback. (If you take the output differentially, you need R3 R4 but you don't need or want R5.) ![]() They serve no fuction in your first version. > R3 and R4 is to bias the plate current for each tube. Put a current probe on the opamp output (or on a 47uFd cap) and at 1KHz you will see a large fraction of an Ampere of AC current. Try that with any real opamp and it will distort like crazy. And your Ideal opamps will pump infinite current into a low-low-low-impedance load. C5 C7 C8 C6 short the opamps' outputs to each other.Ī 47uFd cap is not a perfect short. In your plan, what is the idea behind R6? R3 R4?Īrgh. A single 12AU7 can pump several milliAmps to a load, 6V6 or 6BQ5 several dozen mA, with utter simplicity. Even if you don't abuse them (ask them to drive loudspeakers), they are pretty tricky beasts.įor loads of 10K and several volt signals, if power is not precious, a simple resistor-coupled emitter follower is usually your best bet. Next come the several Futterman variants. It isn't true push-pull and is limited to class A operation, but is dead-simple. If you can't stand transformers: the White Cathode Follower is THE simple quasi-push-pull tube stage. A center-tapped transformer is THE way to do it. You need to recombine the two tubes' outputs OUT of phase. The 12AU7's intrinsic gain of 10 or 15 is badly reduced by misconnection, so apparently it runs with gain around 3, a not unreasonable answer and not one we like. But you have an apparent error in the U1 U2 stage: 0.5V unbalance. If all else were equal, output would be zero. The two tubes are FIGHTING each other! (If you re-bias to class C, you get a frequency doubler.) ![]() You are driving the tubes' inputs push-pull, but taking the output push-push. Why are U2 and V1A V1B not adding any gain? What do you end up with? 1.6V peak.Īnd you'd get the same result with JUST the U1 and R10=22K. Then you feed a couple 12AU7, which might have a gain of 10. You split that to U1, making 1.5V peak, and U2 making -1.0V peak. > is this a reasonable prediction by SPICE? I am too busy with programing interrrupts in uControllers at the moment not to mention arrays and pointers in Borland C, so I'll have to leave the analog wiring exercise during the holidays. I don't want to be doing that to clones but I know I will be, so I might as well do it on the prototypes.Īlso, I want to add some IC filters to the sidechain in the LA2a and stick a handfull of notch filters in parallel between the pre and the output stage. There has been so many occasions where I had to rip the whole circuit apart to rebuilt, always seems to find a "better" way of doing things just when I have finished wiring but never before or during wiring. Since it would be very helpful when comes down to trouble shoot a circuit because things dont usually work right the first time, so still need a lot of practicing and learning from making errors while building a good variety of prototypes. ![]() Besides, I would like to be more confident in building all sorts of pre amps first in order to gain a lot more experience to understand the concept of circuit analysis thoroughly by applying it in practice. Well, I am planning to redo my PCB layout again on Protel so it would be another "little" while I guess. ![]()
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